srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

ir: fix default argument fiasco.

This commit is contained in:
whitequark 2015-10-14 17:02:59 +03:00
parent 5d64df829e
commit b91ffa1b38
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/compiler/ir.py
View File

@ -1184,7 +1184,7 @@ class Parallel(Terminator):
in parallel.
"""
def __init__(self, destinations=[], name=""):
def __init__(self, destinations, name=""):
super().__init__(destinations, builtins.TNone(), name)
def opcode(self):

2
artiq/compiler/transforms/artiq_ir_generator.py
View File

@ -687,7 +687,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
if types.is_builtin(context_expr_node.type, "sequential"):
self.visit(node.body)
elif types.is_builtin(context_expr_node.type, "parallel"):
parallel = self.append(ir.Parallel())
parallel = self.append(ir.Parallel([]))
heads, tails = [], []
for stmt in node.body: