From b87ea79d5169080fc3cce63c1fba841a0ddc5ff8 Mon Sep 17 00:00:00 2001 From: occheung Date: Thu, 15 Jul 2021 15:50:34 +0800 Subject: [PATCH] rv32: rm irq & vexriscv-rust Signed-off-by: occheung --- artiq/firmware/libboard_misoc/Cargo.toml | 1 - artiq/firmware/libboard_misoc/lib.rs | 3 -- .../libboard_misoc/riscv32imac/irq.rs | 46 ------------------- .../libboard_misoc/riscv32imac/mod.rs | 1 - 4 files changed, 51 deletions(-) delete mode 100644 artiq/firmware/libboard_misoc/riscv32imac/irq.rs diff --git a/artiq/firmware/libboard_misoc/Cargo.toml b/artiq/firmware/libboard_misoc/Cargo.toml index 2c817dd65..0d8d705cc 100644 --- a/artiq/firmware/libboard_misoc/Cargo.toml +++ b/artiq/firmware/libboard_misoc/Cargo.toml @@ -17,7 +17,6 @@ byteorder = { version = "1.0", default-features = false } log = { version = "0.4", default-features = false, optional = true } smoltcp = { version = "0.6.0", default-features = false, optional = true } riscv = { version = "0.6.0", features = ["inline-asm"] } -vexriscv = { git = "https://github.com/occheung/vexriscv-rust.git", features = ["inline-asm"] } [features] uart_console = [] diff --git a/artiq/firmware/libboard_misoc/lib.rs b/artiq/firmware/libboard_misoc/lib.rs index 1d94270d8..b9e0cec38 100644 --- a/artiq/firmware/libboard_misoc/lib.rs +++ b/artiq/firmware/libboard_misoc/lib.rs @@ -18,9 +18,6 @@ mod arch; #[cfg(target_arch = "riscv32")] extern crate riscv; -#[cfg(target_arch = "riscv32")] -extern crate vexriscv; - pub use arch::*; include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs")); diff --git a/artiq/firmware/libboard_misoc/riscv32imac/irq.rs b/artiq/firmware/libboard_misoc/riscv32imac/irq.rs deleted file mode 100644 index 4b4120fd1..000000000 --- a/artiq/firmware/libboard_misoc/riscv32imac/irq.rs +++ /dev/null @@ -1,46 +0,0 @@ -use core::{convert::TryFrom}; -use riscv::register::mstatus; -use vexriscv::register::{vmim, vmip}; - -#[inline] -pub fn get_ie() -> bool { - mstatus::read().mie() -} - -#[inline] -pub fn set_ie(ie: bool) { - unsafe { - if ie { - mstatus::set_mie() - } else { - mstatus::clear_mie() - } - } -} - -#[inline] -pub fn get_mask() -> u32 { - u32::try_from(vmim::read()).unwrap() -} - -#[inline] -pub fn set_mask(mask: u32) { - vmim::write(usize::try_from(mask).unwrap()) -} - -#[inline] -pub fn pending_mask() -> u32 { - u32::try_from(vmip::read()).unwrap() -} - -pub fn enable(irq: u32) { - set_mask(get_mask() | (1 << irq)) -} - -pub fn disable(irq: u32) { - set_mask(get_mask() & !(1 << irq)) -} - -pub fn is_pending(irq: u32) -> bool { - get_mask() & (1 << irq) != 0 -} diff --git a/artiq/firmware/libboard_misoc/riscv32imac/mod.rs b/artiq/firmware/libboard_misoc/riscv32imac/mod.rs index 8dd6e5b3c..217ef713f 100644 --- a/artiq/firmware/libboard_misoc/riscv32imac/mod.rs +++ b/artiq/firmware/libboard_misoc/riscv32imac/mod.rs @@ -1,3 +1,2 @@ -pub mod irq; pub mod cache; pub mod boot;