add window data delay

2022-09-02 20:45:13 +00:00 · 2022-09-02 20:45:13 +00:00 · b6586cd7e4
commit b6586cd7e4
parent 3809ac5470
1 changed files with 1 additions and 0 deletions
--- a/artiq/coredevice/phaser.py
+++ b/artiq/coredevice/phaser.py
@ -1335,6 +1335,7 @@ class Miqro:
        for i in range(len(data)):
            addr += 1
            self.write32(addr, (data[i][0] & 0xffff) | (data[i][1] << 16))
+            delay(10*us)

    @kernel
    def pulse(self, window, profiles):