diff --git a/artiq/gateware/targets/sayma_amc_standalone.py b/artiq/gateware/targets/sayma_amc_standalone.py
index 00ab2e7ab..d4a985a92 100755
--- a/artiq/gateware/targets/sayma_amc_standalone.py
+++ b/artiq/gateware/targets/sayma_amc_standalone.py
@@ -190,9 +190,9 @@ class SaymaAMCStandalone(MiniSoC, AMPSoC):
             self.add_csr_group("ad9154", ["ad9154_0", "ad9154_1"])
             self.config["RTIO_FIRST_SAWG_CHANNEL"] = len(rtio_channels)
             rtio_channels.extend(rtio.Channel.from_phy(phy)
-                                for sawg in self.ad9154_0.sawgs +
-                                    self.ad9154_1.sawgs
-                                for phy in sawg.phys)
+                                 for sawg in self.ad9154_0.sawgs +
+                                             self.ad9154_1.sawgs
+                                 for phy in sawg.phys)
 
         self.config["HAS_RTIO_LOG"] = None
         self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
diff --git a/artiq/gateware/targets/sayma_rtm.py b/artiq/gateware/targets/sayma_rtm.py
index 353660b9d..256637c4e 100755
--- a/artiq/gateware/targets/sayma_rtm.py
+++ b/artiq/gateware/targets/sayma_rtm.py
@@ -120,6 +120,7 @@ class SaymaRTM(Module):
         self.submodules.allaki_atts = gpio.GPIOOut(Cat(*allaki_att_gpio))
         csr_devices.append("allaki_atts")
 
+        # HMC clock chip and DAC control
         self.comb += [
             platform.request("ad9154_rst_n").eq(1),
             platform.request("ad9154_txen", 0).eq(0b11),