forked from M-Labs/artiq
gateware: soc -> amp.soc
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aeb1ba8471
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@ -1,2 +1 @@
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from artiq.gateware.amp.kernel_cpu import KernelCPU
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from artiq.gateware.amp.mailbox import Mailbox
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from artiq.gateware.amp.soc import AMPSoC
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@ -5,7 +5,8 @@ from misoc.cores import timer
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from misoc.interconnect import wishbone
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from misoc.integration.builder import *
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from artiq.gateware import amp
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from artiq.gateware.amp.kernel_cpu import KernelCPU
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from artiq.gateware.amp.mailbox import Mailbox
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from artiq import __artiq_dir__ as artiq_dir
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@ -18,11 +19,11 @@ class AMPSoC:
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if not hasattr(self, "cpu"):
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raise ValueError("Platform SoC must be initialized first")
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self.submodules.kernel_cpu = amp.KernelCPU(self.platform)
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self.submodules.kernel_cpu = KernelCPU(self.platform)
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self.add_cpulevel_sdram_if(self.kernel_cpu.wb_sdram)
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self.csr_devices.append("kernel_cpu")
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self.submodules.mailbox = amp.Mailbox(size=3)
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self.submodules.mailbox = Mailbox(size=3)
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self.add_wb_slave(mem_decoder(self.mem_map["mailbox"]),
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self.mailbox.i1)
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self.kernel_cpu.add_wb_slave(mem_decoder(self.mem_map["mailbox"]),
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@ -14,7 +14,7 @@ from misoc.cores import gpio
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from misoc.targets.kc705 import MiniSoC, soc_kc705_args, soc_kc705_argdict
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from misoc.integration.builder import builder_args, builder_argdict
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from artiq.gateware.soc import AMPSoC, build_artiq_soc
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware import rtio, nist_clock, nist_qc2
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from artiq.gateware.rtio.phy import (ttl_simple, ttl_serdes_7series,
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dds, spi)
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@ -10,7 +10,7 @@ from misoc.integration.soc_core import mem_decoder
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from misoc.integration.builder import builder_args, builder_argdict
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from artiq.gateware.ad9154_fmc_ebz import ad9154_fmc_ebz
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from artiq.gateware.soc import AMPSoC, build_artiq_soc
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import ttl_simple
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from artiq.gateware.drtio.transceiver import gtx_7series
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@ -21,7 +21,7 @@ from misoc.cores import spi as spi_csr
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from misoc.targets.kc705 import MiniSoC, soc_kc705_args, soc_kc705_argdict
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from misoc.integration.builder import builder_args, builder_argdict
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from artiq.gateware.soc import AMPSoC, build_artiq_soc
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware import rtio
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from artiq.gateware.ad9154_fmc_ebz import ad9154_fmc_ebz
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from artiq.gateware.rtio.phy import (ttl_simple, ttl_serdes_7series,
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@ -17,7 +17,7 @@ from misoc.targets.pipistrello import (BaseSoC, soc_pipistrello_args,
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soc_pipistrello_argdict)
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from misoc.integration.builder import builder_args, builder_argdict
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from artiq.gateware.soc import AMPSoC, build_artiq_soc
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import ttl_simple, ttl_serdes_spartan6, dds, spi
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from artiq import __version__ as artiq_version
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