forked from M-Labs/artiq
kc705: fix drtio_aux address conflict
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@ -30,7 +30,7 @@ class Master(MiniSoC, AMPSoC):
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"timer_kernel": 0x10000000,
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"rtio": 0x20000000,
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"rtio_dma": 0x30000000,
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"drtio_aux": 0x60000000,
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"drtio_aux": 0x50000000,
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"mailbox": 0x70000000
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}
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mem_map.update(MiniSoC.mem_map)
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@ -126,7 +126,7 @@ fmc_clock_io = [
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class Satellite(BaseSoC):
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mem_map = {
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"drtio_aux": 0x60000000,
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"drtio_aux": 0x50000000,
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}
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mem_map.update(BaseSoC.mem_map)
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