diff --git a/artiq/gateware/targets/sayma_amc.py b/artiq/gateware/targets/sayma_amc.py
index c52d8c3ca..78aef215b 100755
--- a/artiq/gateware/targets/sayma_amc.py
+++ b/artiq/gateware/targets/sayma_amc.py
@@ -379,7 +379,7 @@ class Master(MiniSoC, AMPSoC):
     }
     mem_map.update(MiniSoC.mem_map)
 
-    def __init__(self, with_sawg, **kwargs):
+    def __init__(self, **kwargs):
         MiniSoC.__init__(self,
                          cpu_type="or1k",
                          sdram_controller_type="minicon",
@@ -624,7 +624,7 @@ def main():
     elif variant == "masterdac":
         cls = MasterDAC
     elif variant == "master":
-        cls = Master
+        cls = lambda dummy_with_sawg, **kwargs: Master(**kwargs)
     elif variant == "satellite":
         cls = Satellite
     else: