From b0282fa855a32e42de2e897db7abd98370269d08 Mon Sep 17 00:00:00 2001
From: Robert Jordens <jordens@gmail.com>
Date: Wed, 7 Mar 2018 14:23:28 +0000
Subject: [PATCH] spi2: reset configuration in rio_phy

---
 artiq/gateware/rtio/phy/spi2.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/artiq/gateware/rtio/phy/spi2.py b/artiq/gateware/rtio/phy/spi2.py
index cc4c06da6..c304d5b93 100644
--- a/artiq/gateware/rtio/phy/spi2.py
+++ b/artiq/gateware/rtio/phy/spi2.py
@@ -73,7 +73,7 @@ class SPIMaster(Module):
         config.end.reset = 1
         read = Signal()
 
-        self.sync.rio += [
+        self.sync.rio_phy += [
             If(self.rtlink.i.stb,
                 read.eq(0)
             ),