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firmware/liboard/sdram.rs: iterate read multiple times in read_delays to avoid false positives

This commit is contained in:
Florent Kermarrec 2018-02-21 14:15:35 +01:00
parent 86ceee570f
commit afc16a67b6
1 changed files with 12 additions and 10 deletions
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22
artiq/firmware/libboard/sdram.rs
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@ -177,17 +177,19 @@ mod ddr {
let delay = Cell::new(0);
let incr_delay_until = |expected| {
while delay.get() < DDRPHY_MAX_DELAY {
sdram_phy::command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|
DFII_COMMAND_RDDATA);
spin_cycles(15);
let mut working = true;
for p in 0..DFII_NPHASES {
for &offset in [n, n + DQS_SIGNAL_COUNT].iter() {
let addr = DFII_PIX_RDDATA_ADDR[p].offset(offset as isize);
let data = prs[DFII_PIX_DATA_SIZE * p + offset];
if ptr::read_volatile(addr) as u8 != data {
working = false;
for _ in 0..64 {
sdram_phy::command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|
DFII_COMMAND_RDDATA);
spin_cycles(15);
for p in 0..DFII_NPHASES {
for &offset in [n, n + DQS_SIGNAL_COUNT].iter() {
let addr = DFII_PIX_RDDATA_ADDR[p].offset(offset as isize);
let data = prs[DFII_PIX_DATA_SIZE * p + offset];
if ptr::read_volatile(addr) as u8 != data {
working = false;
}
}
}
}