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rtlink: sanity-check parameters

This commit is contained in:
Sebastien Bourdeauducq 2018-11-26 01:14:02 +08:00
parent b32e89444c
commit ae8ef18f47
1 changed files with 7 additions and 0 deletions
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7
artiq/gateware/rtio/rtlink.py
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@ -8,6 +8,10 @@ class OInterface:
self.stb = Signal() self.stb = Signal()
self.busy = Signal() self.busy = Signal()
assert 0 <= data_width <= 512
assert 0 <= address_width <= 8
assert 0 <= fine_ts_width <= 4
if data_width: if data_width:
self.data = Signal(data_width, reset_less=True) self.data = Signal(data_width, reset_less=True)
if address_width: if address_width:
@ -35,6 +39,9 @@ class IInterface:
timestamped=True, fine_ts_width=0, delay=0): timestamped=True, fine_ts_width=0, delay=0):
self.stb = Signal() self.stb = Signal()
assert 0 <= data_width <= 32
assert 0 <= fine_ts_width <= 4
if data_width: if data_width:
self.data = Signal(data_width, reset_less=True) self.data = Signal(data_width, reset_less=True)
if fine_ts_width: if fine_ts_width: