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firmware/serwb: automatically adjust prbs test delay to prbs test cycles, increase prbs test cycles

This commit is contained in:
Florent Kermarrec 2018-05-24 10:18:08 +02:00
parent 19e5280824
commit ad89c42acc
1 changed files with 7 additions and 4 deletions
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11
artiq/firmware/libboard_artiq/serwb.rs
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@ -43,16 +43,19 @@ pub fn wait_init() {
info!("done."); info!("done.");
unsafe { unsafe {
let prbs_test_cycles : u32 = 1<<22;
let prbs_test_us : u64 = ((prbs_test_cycles as u64)*40)/125; // 40 bits @125MHz linerate
info!("RTM to AMC Link test"); info!("RTM to AMC Link test");
csr::serwb_phy_amc::control_prbs_cycles_write(1<<20); csr::serwb_phy_amc::control_prbs_cycles_write(prbs_test_cycles);
csr::serwb_phy_amc::control_prbs_start_write(1); csr::serwb_phy_amc::control_prbs_start_write(1);
clock::spin_us(1000000); clock::spin_us(prbs_test_us*110/100); // PRBS test time + 10%
info!("{} errors", csr::serwb_phy_amc::control_prbs_errors_read()); info!("{} errors", csr::serwb_phy_amc::control_prbs_errors_read());
info!("AMC to RTM Link test"); info!("AMC to RTM Link test");
csr::serwb_phy_rtm::control_prbs_cycles_write(1<<20); csr::serwb_phy_rtm::control_prbs_cycles_write(prbs_test_cycles);
csr::serwb_phy_rtm::control_prbs_start_write(1); csr::serwb_phy_rtm::control_prbs_start_write(1);
clock::spin_us(1000000); clock::spin_us(prbs_test_us*110/100); // PRBS test time + 10%
info!("{} errors", csr::serwb_phy_rtm::control_prbs_errors_read()); info!("{} errors", csr::serwb_phy_rtm::control_prbs_errors_read());
} }