forked from M-Labs/artiq
doc: DMA can also raise RTIOUnderflow
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@ -71,8 +71,8 @@ class CacheError(Exception):
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class RTIOUnderflow(Exception):
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class RTIOUnderflow(Exception):
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"""Raised when the CPU fails to submit a RTIO event early enough
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"""Raised when the CPU or DMA core fails to submit a RTIO event early
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(with respect to the event's timestamp).
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enough (with respect to the event's timestamp).
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The offending event is discarded and the RTIO core keeps operating.
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The offending event is discarded and the RTIO core keeps operating.
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"""
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"""
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