forked from M-Labs/artiq
1
0
Fork 0

compiler/targets: Fix refactoring leftover for native (host) target

It's unclear whether this actually caused any issues, or why this
wasn't done before (instead just setting the now-removed endianness
flag).
This commit is contained in:
David Nadlinger 2022-11-04 18:16:19 +00:00 committed by Sebastien Bourdeauducq
parent 484c88af24
commit a83f330d74
1 changed files with 1 additions and 1 deletions

View File

@ -263,7 +263,7 @@ class NativeTarget(Target):
def __init__(self): def __init__(self):
super().__init__() super().__init__()
self.triple = llvm.get_default_triple() self.triple = llvm.get_default_triple()
host_data_layout = str(llvm.targets.Target.from_default_triple().create_target_machine().target_data) self.data_layout = str(llvm.targets.Target.from_default_triple().create_target_machine().target_data)
class RV32IMATarget(Target): class RV32IMATarget(Target):
triple = "riscv32-unknown-linux" triple = "riscv32-unknown-linux"