forked from M-Labs/artiq
fix indentation
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@ -7,11 +7,11 @@ from artiq.coredevice.rtio import rtio_output, rtio_input_data
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__all__ = [
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"SPI_DATA_ADDR", "SPI_XFER_ADDR", "SPI_CONFIG_ADDR",
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"SPI_OFFLINE", "SPI_ACTIVE", "SPI_PENDING",
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"SPI_CS_POLARITY", "SPI_CLK_POLARITY", "SPI_CLK_PHASE",
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"SPI_LSB_FIRST", "SPI_HALF_DUPLEX",
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"SPIMaster", "NRTSPIMaster"
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"SPI_DATA_ADDR", "SPI_XFER_ADDR", "SPI_CONFIG_ADDR",
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"SPI_OFFLINE", "SPI_ACTIVE", "SPI_PENDING",
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"SPI_CS_POLARITY", "SPI_CLK_POLARITY", "SPI_CLK_PHASE",
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"SPI_LSB_FIRST", "SPI_HALF_DUPLEX",
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"SPIMaster", "NRTSPIMaster"
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]
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