forked from M-Labs/artiq
firmware/spi: work around cs_polarity semantics
The semantics differ between the RTIO and CSR interface.
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@ -10,9 +10,16 @@ mod imp {
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while csr::converter_spi::idle_read() == 0 {}
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while csr::converter_spi::idle_read() == 0 {}
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csr::converter_spi::offline_write(flags >> 0 & 1);
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csr::converter_spi::offline_write(flags >> 0 & 1);
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csr::converter_spi::end_write(flags >> 1 & 1);
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csr::converter_spi::end_write(flags >> 1 & 1);
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/* input (in RTIO): flags >> 2 & 1 */
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// input (in RTIO): flags >> 2 & 1
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/* cs_polarity is a mask in the CSR interface */
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// cs_polarity is a mask in the CSR interface
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csr::converter_spi::cs_polarity_write(0xff & (flags >> 3 & 1));
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// only affect the bits that are selected
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let mut cs_polarity = csr::converter_spi::cs_polarity_read();
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if flags >> 3 & 1 != 0 {
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cs_polarity |= cs;
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} else {
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cs_polarity &= !cs;
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}
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csr::converter_spi::cs_polarity_write(cs_polarity);
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csr::converter_spi::clk_polarity_write(flags >> 4 & 1);
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csr::converter_spi::clk_polarity_write(flags >> 4 & 1);
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csr::converter_spi::clk_phase_write(flags >> 5 & 1);
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csr::converter_spi::clk_phase_write(flags >> 5 & 1);
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csr::converter_spi::lsb_first_write(flags >> 6 & 1);
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csr::converter_spi::lsb_first_write(flags >> 6 & 1);
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