forked from M-Labs/artiq
test: RTIO underflow exception
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@ -2,7 +2,7 @@ import unittest
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from artiq.language.core import *
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from artiq.language.core import *
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from artiq.language.units import *
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from artiq.language.units import *
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from artiq.devices import corecom_serial, core, rtio_core
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from artiq.devices import corecom_serial, core, runtime_exceptions, rtio_core
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from artiq.sim import devices as sim_devices
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from artiq.sim import devices as sim_devices
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@ -100,16 +100,36 @@ class _RTIOLoopback(AutoContext):
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self.report(self.i.sync())
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self.report(self.i.sync())
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class _RTIOUnderflow(AutoContext):
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parameters = "o"
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@kernel
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def run(self):
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for i in range(10000):
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delay(25*ns)
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self.o.pulse(25*ns)
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class RTIOCase(unittest.TestCase):
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class RTIOCase(unittest.TestCase):
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def test_loopback(self):
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def test_loopback(self):
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npulses = 4
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npulses = 4
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with corecom_serial.CoreCom() as com:
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with corecom_serial.CoreCom() as com:
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coredev = core.Core(com)
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coredev = core.Core(com)
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lb = _RTIOLoopback(
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uut = _RTIOLoopback(
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core=coredev,
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core=coredev,
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i=rtio_core.RTIOCounter(core=coredev, channel=0),
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i=rtio_core.RTIOCounter(core=coredev, channel=0),
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o=rtio_core.RTIOOut(core=coredev, channel=1),
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o=rtio_core.RTIOOut(core=coredev, channel=1),
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npulses=npulses
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npulses=npulses
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)
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)
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lb.run()
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uut.run()
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self.assertEqual(lb.result, npulses)
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self.assertEqual(uut.result, npulses)
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def test_underflow(self):
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with corecom_serial.CoreCom() as com:
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coredev = core.Core(com)
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uut = _RTIOUnderflow(
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core=coredev,
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o=rtio_core.RTIOOut(core=coredev, channel=1)
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)
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with self.assertRaises(runtime_exceptions.RTIOUnderflow):
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uut.run()
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