forked from M-Labs/artiq
firmware: improve ad9154/hmc830/hmc7043 messaging
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fedf7f0c87
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a640041844
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@ -146,12 +146,12 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
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1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE);
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clock::spin_us(100);
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if (read(ad9154_reg::PRODIDH) as u16) << 8 | (read(ad9154_reg::PRODIDL) as u16) != 0x9154 {
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return Err("AD9154 not found");
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return Err("invalid AD9154 identification");
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} else {
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info!("AD9154-{} found", dacno);
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}
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info!("AD9154-{} configuration...", dacno);
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info!("AD9154-{} initializing...", dacno);
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write(ad9154_reg::PWRCNTRL0,
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0*ad9154_reg::PD_DAC0 | 0*ad9154_reg::PD_DAC1 |
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0*ad9154_reg::PD_DAC2 | 0*ad9154_reg::PD_DAC3 |
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@ -348,7 +348,7 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
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let t = clock::get_ms();
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while read(ad9154_reg::PLL_STATUS) & ad9154_reg::SERDES_PLL_LOCK_RB == 0 {
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if clock::get_ms() > t + 200 {
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return Err("AD9154 SERDES PLL lock timeout");
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return Err("SERDES PLL lock timeout");
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}
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}
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@ -375,13 +375,13 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
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0*ad9154_reg::SYNCCLRLAST);
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clock::spin_us(1000); // ensure at least one sysref edge
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if read(ad9154_reg::SYNC_CONTROL) & ad9154_reg::SYNCARM != 0 {
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return Err("AD9154 no sysref edge");
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return Err("no sysref edge");
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}
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if read(ad9154_reg::SYNC_STATUS) & ad9154_reg::SYNC_LOCK == 0 {
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return Err("AD9154 no sync lock");
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return Err("no sync lock");
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}
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if read(ad9154_reg::SYNC_STATUS) & ad9154_reg::SYNC_WLIM != 0 {
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return Err("AD9154 sysref phase error");
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return Err("sysref phase error");
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}
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write(ad9154_reg::XBAR_LN_0_1,
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0*ad9154_reg::LOGICAL_LANE0_SRC | 1*ad9154_reg::LOGICAL_LANE1_SRC);
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@ -395,6 +395,7 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
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write(ad9154_reg::GENERAL_JRX_CTRL_0,
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0x1*ad9154_reg::LINK_EN | 0*ad9154_reg::LINK_PAGE |
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0*ad9154_reg::LINK_MODE | 0*ad9154_reg::CHECKSUM_MODE);
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info!(" ...done");
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Ok(())
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}
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@ -498,7 +499,7 @@ fn dac_prbs(dacno: u8) -> Result<(), &'static str> {
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let mut prbs_errors: u32 = 0;
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/* follow phy prbs testing (p58 of ad9154 datasheet) */
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info!("AD9154-{} PRBS test", dacno);
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info!("AD9154-{} running PRBS test...", dacno);
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/* step 1: start sending prbs7 pattern from the transmitter */
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jesd_prbs(dacno, true);
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@ -546,7 +547,7 @@ fn dac_prbs(dacno: u8) -> Result<(), &'static str> {
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((read(ad9154_reg::PHY_PRBS_TEST_ERRCNT_MIDBITS) as u32) << 8) |
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((read(ad9154_reg::PHY_PRBS_TEST_ERRCNT_HIBITS) as u32) << 16);
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if lane_errors > 0 {
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warn!("AD9154-{} PRBS errors on lane{}: {:06x}", dacno, i, lane_errors);
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warn!(" PRBS errors on lane{}: {:06x}", i, lane_errors);
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}
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prbs_errors += lane_errors
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}
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@ -554,8 +555,9 @@ fn dac_prbs(dacno: u8) -> Result<(), &'static str> {
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jesd_prbs(dacno, false);
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if prbs_errors > 0 {
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return Err("AD9154 PRBS failed")
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return Err("PRBS failed")
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}
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info!(" ...passed");
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Ok(())
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}
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@ -613,7 +615,7 @@ fn dac_sysref_scan(dacno: u8) {
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let mut phase_min = None;
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let mut phase_max = None;
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info!("AD9154-{} SYSREF scan/conf...", dacno);
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info!("AD9154-{} SYSREF scan:", dacno);
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for phase in 0..512 {
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hmc7043::cfg_dac_sysref(dacno, phase);
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clock::spin_us(10000);
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@ -652,7 +654,6 @@ pub fn init() -> Result<(), &'static str> {
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for dacno in 0..csr::AD9154.len() {
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let dacno = dacno as u8;
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debug!("setting up AD9154-{} DAC...", dacno);
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dac_sysref_scan(dacno);
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dac_sysref_cfg(dacno, 88);
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dac_cfg_retry(dacno)?;
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@ -116,22 +116,22 @@ mod hmc830 {
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for &(addr, data) in HMC830_WRITES.iter() {
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write(addr, data);
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}
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info!("...done");
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info!(" ...done");
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let t = clock::get_ms();
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info!("waiting for lock...");
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while read(0x12) & 0x02 == 0 {
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if clock::get_ms() > t + 2000 {
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error!("HMC830 lock timeout. Register dump:");
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error!(" lock timeout. Register dump:");
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for addr in 0x00..0x14 {
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// These registers don't exist (in the data sheet at least)
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if addr == 0x0d || addr == 0x0e { continue; }
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error!("[0x{:02x}] = 0x{:04x}", addr, read(addr));
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error!(" [0x{:02x}] = 0x{:04x}", addr, read(addr));
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}
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return Err("HMC830 lock timeout");
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return Err("lock timeout");
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}
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}
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info!("...locked");
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info!(" ...locked");
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Ok(())
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}
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@ -274,7 +274,7 @@ pub mod hmc7043 {
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write(channel_base + 0x8, 0x08)
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}
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info!("...done");
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info!(" ...done");
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Ok(())
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}
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