forked from M-Labs/artiq
drtio: cleanup test_full_stack
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@ -203,5 +203,5 @@ class TestFullStack(unittest.TestCase):
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run_simulation(dut,
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run_simulation(dut,
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{"sys": test(), "rtio": check_ttls()},
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{"sys": test(), "rtio": check_ttls()},
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{"sys": 8, "rtio": 5, "rtio_rx": 5, "rio": 5, "rio_phy": 5}, vcd_name="foo.vcd")
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{"sys": 8, "rtio": 5, "rtio_rx": 5, "rio": 5, "rio_phy": 5})
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self.assertEqual(ttl_changes, correct_ttl_changes)
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self.assertEqual(ttl_changes, correct_ttl_changes)
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