Revert "gateware/rt2wb: only input when active"

This reverts commit 1b08e65fa1.
2016-02-29 16:44:11 +01:00 · 2016-02-29 16:44:11 +01:00 · a0083f4501
parent cb8815cc65
commit a0083f4501
1 changed files with 1 additions and 1 deletions
--- a/artiq/gateware/rtio/phy/wishbone.py
+++ b/artiq/gateware/rtio/phy/wishbone.py
@ -39,6 +39,6 @@ class RT2WB(Module):
            wb.cyc.eq(active),
            wb.stb.eq(active),

-            self.rtlink.i.stb.eq(active & wb.ack & ~wb.we),
+            self.rtlink.i.stb.eq(wb.ack & ~wb.we),
            self.rtlink.i.data.eq(wb.dat_r)
        ]