forked from M-Labs/artiq
drtio: connect KernelInitiator correctly
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@ -57,7 +57,7 @@ class Master(MiniSoC, AMPSoC):
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self.submodules.rtio_core = rtio.Core(rtio_channels)
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self.submodules.cridec = rtio.CRIDecoder([self.drtio.cri, self.rtio_core.cri])
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self.submodules.rtio = rtio.KernelInitiator(self.cridec.cri)
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self.submodules.rtio = rtio.KernelInitiator(self.cridec.master)
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self.register_kernel_cpu_csrdevice("rtio")
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