forked from M-Labs/artiq
gateware/amp/mailbox: simplify
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@ -12,12 +12,10 @@ class Mailbox(Module):
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value = Signal(32)
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for i in self.i1, self.i2:
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self.sync += [
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i.ack.eq(0),
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If(i.cyc & i.stb & ~i.ack, i.ack.eq(1)),
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i.dat_r.eq(value),
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If(i.cyc & i.stb & i.we,
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[If(i.sel[j], value[j*8:j*8+8].eq(i.dat_w[j*8:j*8+8]))
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for j in range(4)]
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i.ack.eq(0),
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If(i.cyc & i.stb & ~i.ack,
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i.ack.eq(1),
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If(i.we, value.eq(i.dat_w))
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)
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]
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