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liboard_artiq/hmc830_7043: allow sysref digital/analog delay configuration (will need to be adjusted for jesd subclass1)

This commit is contained in:
Florent Kermarrec 2018-01-19 17:17:58 +01:00
parent d27727968c
commit 9eb13aba3c
1 changed files with 6 additions and 0 deletions
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6
artiq/firmware/libboard_artiq/hmc830_7043.rs
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@ -170,9 +170,15 @@ mod hmc7043 {
info!("HMC7043 found"); info!("HMC7043 found");
} }
info!("HMC7043 configuration..."); info!("HMC7043 configuration...");
/* global configuration */
for &(addr, data) in HMC7043_WRITES.iter() { for &(addr, data) in HMC7043_WRITES.iter() {
write(addr, data); write(addr, data);
} }
/* sysref digital coarse delay configuration (18 steps, 1/2VCO cycle/step)*/
write(0x112, 0x0);
/* sysref analog fine delay configuration (24 steps, 25ps/step)*/
write(0x111, 0x0);
Ok(()) Ok(())
} }
} }