forked from M-Labs/artiq
firmware: allow building without system UART.
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parent
158ceb0881
commit
9ea7d7a804
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@ -18,6 +18,7 @@ include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/sdram_phy.rs"));
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pub mod sdram;
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pub mod ident;
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pub mod clock;
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#[cfg(has_uart)]
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pub mod uart;
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#[cfg(has_spiflash)]
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pub mod spiflash;
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@ -1,16 +1,24 @@
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use core::fmt;
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use csr;
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pub struct Console;
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impl fmt::Write for Console {
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#[cfg(has_uart)]
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fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
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use csr;
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for c in s.bytes() {
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unsafe {
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while csr::uart::txfull_read() != 0 {}
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csr::uart::rxtx_write(c)
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}
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}
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Ok(())
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}
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#[cfg(not(has_uart))]
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fn write_str(&mut self, _s: &str) -> Result<(), fmt::Error> {
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Ok(())
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}
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}
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@ -77,17 +77,19 @@ fn startup() {
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#[cfg(has_serwb_phy_amc)]
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board_artiq::serwb::wait_init();
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let t = board::clock::get_ms();
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info!("press 'e' to erase startup and idle kernels...");
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while board::clock::get_ms() < t + 1000 {
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if unsafe { board::csr::uart::rxtx_read() == b'e' } {
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config::remove("startup_kernel").unwrap();
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config::remove("idle_kernel").unwrap();
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info!("startup and idle kernels erased");
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break
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#[cfg(has_uart)] {
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let t = board::clock::get_ms();
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info!("press 'e' to erase startup and idle kernels...");
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while board::clock::get_ms() < t + 1000 {
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if unsafe { board::csr::uart::rxtx_read() == b'e' } {
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config::remove("startup_kernel").unwrap();
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config::remove("idle_kernel").unwrap();
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info!("startup and idle kernels erased");
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break
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}
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}
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info!("continuing boot");
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}
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info!("continuing boot");
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#[cfg(has_i2c)]
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board_artiq::i2c::init();
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