srenblad/artiq
1
0
Fork 0
forked from M-Labs/artiq
Code Pull Requests Activity

coredevice/i2c,ttl,spi: consistent device get

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2016-03-09 13:01:34 +08:00
parent 2e4e251877
commit 9d1903a4e2
3 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
artiq/coredevice/i2c.py
View File

@ -34,8 +34,8 @@ class PCA9548:
On the KC705, this chip is used for selecting the I2C buses on the two FMC On the KC705, this chip is used for selecting the I2C buses on the two FMC
connectors. HPC=1, LPC=2. connectors. HPC=1, LPC=2.
""" """
def __init__(self, dmgr, busno=0, address=0xe8): def __init__(self, dmgr, busno=0, address=0xe8, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.busno = busno self.busno = busno
self.address = address self.address = address
@ -77,8 +77,8 @@ class TCA6424A:
On the NIST QC2 hardware, this chip is used for switching the directions On the NIST QC2 hardware, this chip is used for switching the directions
of TTL buffers.""" of TTL buffers."""
def __init__(self, dmgr, busno=0, address=0x44): def __init__(self, dmgr, busno=0, address=0x44, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.busno = busno self.busno = busno
self.address = address self.address = address

4
artiq/coredevice/spi.py
View File

@ -40,8 +40,8 @@ class SPIMaster:
:param channel: RTIO channel number of the SPI bus to control. :param channel: RTIO channel number of the SPI bus to control.
""" """
def __init__(self, dmgr, channel): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.ref_period_mu = seconds_to_mu(self.core.coarse_ref_period, self.ref_period_mu = seconds_to_mu(self.core.coarse_ref_period,
self.core) self.core)
self.channel = channel self.channel = channel

12
artiq/coredevice/ttl.py
View File

@ -10,8 +10,8 @@ class TTLOut:
:param channel: channel number :param channel: channel number
""" """
def __init__(self, dmgr, channel): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.channel = channel self.channel = channel
# in RTIO cycles # in RTIO cycles
@ -82,8 +82,8 @@ class TTLInOut:
:param channel: channel number :param channel: channel number
""" """
def __init__(self, dmgr, channel): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.channel = channel self.channel = channel
# in RTIO cycles # in RTIO cycles
@ -232,8 +232,8 @@ class TTLClockGen:
:param channel: channel number :param channel: channel number
""" """
def __init__(self, dmgr, channel): def __init__(self, dmgr, channel, core_device="core"):
self.core = dmgr.get("core") self.core = dmgr.get(core_device)
self.channel = channel self.channel = channel
# in RTIO cycles # in RTIO cycles