forked from M-Labs/artiq
serwb/kusphy: use same serwb_serdes_5x reset than s7phy
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@ -48,7 +48,7 @@ class KUSSerdes(Module):
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self.cd_serwb_serdes_20x.clk.eq(pll.serwb_serdes_20x_clk)
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]
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self.specials += AsyncResetSynchronizer(self.cd_serwb_serdes, ~pll.lock)
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self.specials += AsyncResetSynchronizer(self.cd_serwb_serdes_5x, ~pll.lock)
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self.comb += self.cd_serwb_serdes_5x.rst.eq(self.cd_serwb_serdes.rst)
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# control/status cdc
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tx_idle = Signal()
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