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LLVMIRGenerator: add target data layout to LLVM modules.

This commit is contained in:
whitequark 2015-08-09 14:39:21 +03:00
parent 153592f1cc
commit 9c5ca2ae29
2 changed files with 5 additions and 0 deletions

View File

@ -12,6 +12,8 @@ class Target:
:var triple: (string)
LLVM target triple, e.g. ``"or1k"``
:var data_layout: (string)
LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"``
:var features: (list of string)
LLVM target CPU features, e.g. ``["mul", "div", "ffl1"]``
:var print_function: (string)
@ -19,6 +21,7 @@ class Target:
provided by the target, e.g. ``"printf"``.
"""
triple = "unknown"
data_layout = ""
features = []
print_function = "printf"
@ -82,5 +85,6 @@ class NativeTarget(Target):
class OR1KTarget(Target):
triple = "or1k-linux"
data_layout = "E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"
attributes = ["mul", "div", "ffl1", "cmov", "addc"]
print_function = "lognonl"

View File

@ -14,6 +14,7 @@ class LLVMIRGenerator:
self.llcontext = target.llcontext
self.llmodule = ll.Module(context=self.llcontext, name=module_name)
self.llmodule.triple = target.triple
self.llmodule.data_layout = target.data_layout
self.llfunction = None
self.llmap = {}
self.fixups = []