forked from M-Labs/artiq
compiler: Emit sret call site argument attributes
LLVM 6 seemed not to mind the mismatch, but more recent versions produce miscompilations without this. Needs llvmlite support (GitHub: numba/llvmlite#702).
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@ -1355,7 +1355,7 @@ class LLVMIRGenerator:
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llstackptr = self.llbuilder.call(self.llbuiltin("llvm.stacksave"), [])
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llstackptr = self.llbuilder.call(self.llbuiltin("llvm.stacksave"), [])
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llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee)
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llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee)
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llcall = self.llbuilder.call(llfun, [llresultslot] + llargs)
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self.llbuilder.call(llfun, [llresultslot] + llargs, arg_attrs={0: "sret"})
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llresult = self.llbuilder.load(llresultslot)
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llresult = self.llbuilder.load(llresultslot)
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self.llbuilder.call(self.llbuiltin("llvm.stackrestore"), [llstackptr])
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self.llbuilder.call(self.llbuiltin("llvm.stackrestore"), [llstackptr])
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@ -1388,7 +1388,8 @@ class LLVMIRGenerator:
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llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee)
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llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee)
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llcall = self.llbuilder.invoke(llfun, [llresultslot] + llargs,
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llcall = self.llbuilder.invoke(llfun, [llresultslot] + llargs,
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llnormalblock, llunwindblock, name=insn.name)
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llnormalblock, llunwindblock, name=insn.name,
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arg_attrs={0: "sret"})
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self.llbuilder.position_at_start(llnormalblock)
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self.llbuilder.position_at_start(llnormalblock)
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llresult = self.llbuilder.load(llresultslot)
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llresult = self.llbuilder.load(llresultslot)
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