forked from M-Labs/artiq
compiler: support Cortex A9 target
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afe162ceca
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@ -254,3 +254,10 @@ class OR1KTarget(Target):
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features = ["mul", "div", "ffl1", "cmov", "addc"]
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print_function = "core_log"
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little_endian = False
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class CortexA9Target(Target):
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triple = "armv7-unknown-linux-gnueabihf"
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data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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features = ["dsp", "fp16", "neon", "vfp3"]
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print_function = "core_log"
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little_endian = True
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@ -11,7 +11,7 @@ from artiq.language.units import *
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from artiq.compiler.module import Module
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from artiq.compiler.embedding import Stitcher
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from artiq.compiler.targets import OR1KTarget
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from artiq.compiler.targets import OR1KTarget, CortexA9Target
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from artiq.coredevice.comm_kernel import CommKernel, CommKernelDummy
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# Import for side effects (creating the exception classes).
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@ -71,9 +71,15 @@ class Core:
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"core", "ref_period", "coarse_ref_period", "ref_multiplier",
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}
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def __init__(self, dmgr, host, ref_period, ref_multiplier=8):
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def __init__(self, dmgr, host, ref_period, ref_multiplier=8, target="or1k"):
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self.ref_period = ref_period
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self.ref_multiplier = ref_multiplier
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if target == "or1k":
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self.target_cls = OR1KTarget
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elif target == "cortexa9":
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self.target_cls = CortexA9Target
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else:
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raise ValueError("Unsupported target")
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self.coarse_ref_period = ref_period*ref_multiplier
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if host is None:
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self.comm = CommKernelDummy()
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@ -101,7 +107,7 @@ class Core:
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module = Module(stitcher,
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ref_period=self.ref_period,
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attribute_writeback=attribute_writeback)
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target = OR1KTarget()
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target = self.target_cls()
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library = target.compile_and_link([module])
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stripped_library = target.strip(library)
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