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compiler: support Cortex A9 target

This commit is contained in:
Sebastien Bourdeauducq 2019-08-26 10:45:00 +08:00
parent afe162ceca
commit 98cd9a539c
2 changed files with 16 additions and 3 deletions
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7
artiq/compiler/targets.py
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@ -254,3 +254,10 @@ class OR1KTarget(Target):
features = ["mul", "div", "ffl1", "cmov", "addc"] features = ["mul", "div", "ffl1", "cmov", "addc"]
print_function = "core_log" print_function = "core_log"
little_endian = False little_endian = False
class CortexA9Target(Target):
triple = "armv7-unknown-linux-gnueabihf"
data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
features = ["dsp", "fp16", "neon", "vfp3"]
print_function = "core_log"
little_endian = True

12
artiq/coredevice/core.py
View File

@ -11,7 +11,7 @@ from artiq.language.units import *
from artiq.compiler.module import Module from artiq.compiler.module import Module
from artiq.compiler.embedding import Stitcher from artiq.compiler.embedding import Stitcher
from artiq.compiler.targets import OR1KTarget from artiq.compiler.targets import OR1KTarget, CortexA9Target
from artiq.coredevice.comm_kernel import CommKernel, CommKernelDummy from artiq.coredevice.comm_kernel import CommKernel, CommKernelDummy
# Import for side effects (creating the exception classes). # Import for side effects (creating the exception classes).
@ -71,9 +71,15 @@ class Core:
"core", "ref_period", "coarse_ref_period", "ref_multiplier", "core", "ref_period", "coarse_ref_period", "ref_multiplier",
} }
def __init__(self, dmgr, host, ref_period, ref_multiplier=8): def __init__(self, dmgr, host, ref_period, ref_multiplier=8, target="or1k"):
self.ref_period = ref_period self.ref_period = ref_period
self.ref_multiplier = ref_multiplier self.ref_multiplier = ref_multiplier
if target == "or1k":
self.target_cls = OR1KTarget
elif target == "cortexa9":
self.target_cls = CortexA9Target
else:
raise ValueError("Unsupported target")
self.coarse_ref_period = ref_period*ref_multiplier self.coarse_ref_period = ref_period*ref_multiplier
if host is None: if host is None:
self.comm = CommKernelDummy() self.comm = CommKernelDummy()
@ -101,7 +107,7 @@ class Core:
module = Module(stitcher, module = Module(stitcher,
ref_period=self.ref_period, ref_period=self.ref_period,
attribute_writeback=attribute_writeback) attribute_writeback=attribute_writeback)
target = OR1KTarget() target = self.target_cls()
library = target.compile_and_link([module]) library = target.compile_and_link([module])
stripped_library = target.strip(library) stripped_library = target.strip(library)