forked from M-Labs/artiq
firmware: fix Si5324 CKIN selection on Kasli 2.0
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
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@ -145,15 +145,25 @@ fn setup_si5324_as_synthesizer() {
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bwsel : 3,
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bwsel : 3,
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crystal_ref: true
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crystal_ref: true
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};
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};
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si5324::setup(&SI5324_SETTINGS, si5324::Input::Ckin2).expect("cannot initialize Si5324");
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0", not(si5324_ext_ref)))]
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let si5324_ref_input = si5324::Input::Ckin2;
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0", si5324_ext_ref))]
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let si5324_ref_input = si5324::Input::Ckin1;
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#[cfg(all(soc_platform = "kasli", not(hw_rev = "v2.0")))]
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let si5324_ref_input = si5324::Input::Ckin2;
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si5324::setup(&SI5324_SETTINGS, si5324_ref_input).expect("cannot initialize Si5324");
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}
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}
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pub fn init() {
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pub fn init() {
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#[cfg(si5324_as_synthesizer)]
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#[cfg(si5324_as_synthesizer)]
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{
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{
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0"))]
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let si5324_ext_input = si5324::Input::Ckin1;
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#[cfg(all(soc_platform = "kasli", not(hw_rev = "v2.0")))]
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let si5324_ext_input = si5324::Input::Ckin2;
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match get_rtio_clock_cfg() {
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match get_rtio_clock_cfg() {
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RtioClock::Internal => setup_si5324_as_synthesizer(),
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RtioClock::Internal => setup_si5324_as_synthesizer(),
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RtioClock::External => si5324::bypass(si5324::Input::Ckin2).expect("cannot bypass Si5324")
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RtioClock::External => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324")
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}
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}
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}
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}
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