From 90a6fe1c353a58299bce8e0cd510a9c9321c74be Mon Sep 17 00:00:00 2001 From: mwojcik Date: Thu, 23 Feb 2023 16:00:10 +0800 Subject: [PATCH] satellite: add dma to gateware --- artiq/gateware/targets/kasli.py | 4 +++- artiq/gateware/targets/kc705.py | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py index f26e839dd..ecb49451f 100755 --- a/artiq/gateware/targets/kasli.py +++ b/artiq/gateware/targets/kasli.py @@ -567,8 +567,10 @@ class SatelliteBase(BaseSoC): self.submodules.local_io = SyncRTIO(self.rtio_tsc, rtio_channels, lane_count=sed_lanes) self.comb += self.drtiosat.async_errors.eq(self.local_io.async_errors) + self.submodules.rtio_dma = rtio.DMA(self.get_native_sdram_if(), self.cpu_dw) + self.csr_devices.append("rtio_dma") self.submodules.cri_con = rtio.CRIInterconnectShared( - [self.drtiosat.cri], + [self.drtiosat.cri, self.rtio_dma.cri], [self.local_io.cri] + self.drtio_cri, enable_routing=True) self.csr_devices.append("cri_con") diff --git a/artiq/gateware/targets/kc705.py b/artiq/gateware/targets/kc705.py index 074abc9f4..6444410cd 100755 --- a/artiq/gateware/targets/kc705.py +++ b/artiq/gateware/targets/kc705.py @@ -451,8 +451,10 @@ class _SatelliteBase(BaseSoC): self.submodules.local_io = SyncRTIO(self.rtio_tsc, rtio_channels) self.comb += self.drtiosat.async_errors.eq(self.local_io.async_errors) + self.submodules.rtio_dma = rtio.DMA(self.get_native_sdram_if(), self.cpu_dw) + self.csr_devices.append("rtio_dma") self.submodules.cri_con = rtio.CRIInterconnectShared( - [self.drtiosat.cri], + [self.drtiosat.cri, self.rtio_dma.cri], [self.local_io.cri] + self.drtio_cri, enable_routing=True) self.csr_devices.append("cri_con")