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examples/sines_urukul_sayma: adapt for sayma v2, use 1 DAC only

This commit is contained in:
Sebastien Bourdeauducq 2020-04-05 16:51:40 +08:00
parent 90d08988b2
commit 8f608fa2fa
2 changed files with 24 additions and 18 deletions
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20
artiq/examples/kasli_sawgmaster/device_db.py
View File

@ -25,50 +25,42 @@ device_db = {
},
}
for i in range(8):
device_db["ttl" + str(i)] = {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut" if i < 4 else "TTLOut",
"arguments": {"channel": 1+i},
}
device_db.update(
spi_urukul0={
"type": "local",
"module": "artiq.coredevice.spi2",
"class": "SPIMaster",
"arguments": {"channel": 9}
"arguments": {"channel": 0}
},
ttl_urukul0_io_update={
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 10}
"arguments": {"channel": 1}
},
ttl_urukul0_sw0={
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 11}
"arguments": {"channel": 2}
},
ttl_urukul0_sw1={
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 12}
"arguments": {"channel": 3}
},
ttl_urukul0_sw2={
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 13}
"arguments": {"channel": 4}
},
ttl_urukul0_sw3={
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 14}
"arguments": {"channel": 5}
},
urukul0_cpld={
"type": "local",

22
artiq/examples/kasli_sawgmaster/repository/sines_urukul_sayma.py
View File

@ -8,9 +8,6 @@ class SinesUrukulSayma(EnvExperiment):
# Urukul clock output syntonized to the RTIO clock.
# Can be used as HMC830 reference on Sayma RTM.
# The clock output on Sayma AMC cannot be used, as it is derived from
# another Si5324 output than the GTH, and the two Si5324 output dividers
# are not synchronized with each other.
# When using this reference, Sayma must be recalibrated every time Urukul
# is rebooted, as Urukul is not synchronized to the Kasli.
self.urukul_hmc_ref = self.get_device("urukul0_ch3")
@ -19,8 +16,16 @@ class SinesUrukulSayma(EnvExperiment):
# When testing sync, do not reboot Urukul, as it is not
# synchronized to the Kasli.
self.urukul_meas = [self.get_device("urukul0_ch" + str(i)) for i in range(3)]
self.sawgs = [self.get_device("sawg"+str(i)) for i in range(8)]
# The same waveform is output on all first 4 SAWG channels (first DAC).
self.sawgs = [self.get_device("sawg"+str(i)) for i in range(4)]
self.basemod = self.get_device("basemod_att0")
self.rfsws = [self.get_device("sawg_sw"+str(i)) for i in range(4)]
# DRTIO destinations:
# 0: local
# 1: Sayma AMC
# 2: Sayma RTM
@kernel
def drtio_is_up(self):
for i in range(3):
@ -61,6 +66,15 @@ class SinesUrukulSayma(EnvExperiment):
self.core.reset()
delay(10*ms)
self.basemod.reset()
delay(10*ms)
self.basemod.set(3.0, 3.0, 3.0, 3.0)
delay(10*ms)
for rfsw in self.rfsws:
delay(1*ms)
rfsw.on()
for sawg in self.sawgs:
delay(1*ms)
sawg.reset()