From 8dbf5f87fd789ba32c7a655c828bab6cffcded73 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Thu, 25 Oct 2018 16:02:13 +0000 Subject: [PATCH] ad9910: simplify io_update pulsing on init, set_mu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Robert Jördens --- artiq/coredevice/ad9910.py | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py index 442b40210..0617bc952 100644 --- a/artiq/coredevice/ad9910.py +++ b/artiq/coredevice/ad9910.py @@ -136,7 +136,7 @@ class AD9910: """ # Set SPI mode self.write32(_AD9910_REG_CFR1, 0x00000002) - self.cpld.io_update.pulse(2*us) + self.cpld.io_update.pulse(1*us) delay(1*ms) if not blind: # Use the AUX DAC setting to identify and confirm presence @@ -146,13 +146,13 @@ class AD9910: delay(50*us) # slack # Configure PLL settings and bring up PLL self.write32(_AD9910_REG_CFR2, 0x01400020) - self.cpld.io_update.pulse(2*us) + self.cpld.io_update.pulse(1*us) cfr3 = (0x0807c100 | (self.pll_vco << 24) | (self.pll_cp << 19) | (self.pll_n << 1)) self.write32(_AD9910_REG_CFR3, cfr3 | 0x400) # PFD reset - self.cpld.io_update.pulse(100*us) + self.cpld.io_update.pulse(1*us) self.write32(_AD9910_REG_CFR3, cfr3) - self.cpld.io_update.pulse(100*us) + self.cpld.io_update.pulse(1*us) if blind: delay(100*ms) return @@ -172,7 +172,6 @@ class AD9910: :param bits: power down bits, see datasheet """ self.write32(_AD9910_REG_CFR1, 0x00000002 | (bits << 4)) - delay(1*us) self.cpld.io_update.pulse(1*us) @kernel @@ -187,7 +186,7 @@ class AD9910: :param asf: Amplitude scale factor: 14 bit unsigned. """ self.write64(_AD9910_REG_PR0, (asf << 16) | pow, ftw) - self.cpld.io_update.pulse(10*ns) + self.cpld.io_update.pulse_mu(8) @portable(flags={"fast-math"}) def frequency_to_ftw(self, frequency):