forked from M-Labs/artiq
firmware: prepare config block for access from BIOS/bootloader.
This is in 3.2 so that users lose storage only once.
This commit is contained in:
parent
135c138ec3
commit
8c19d90179
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@ -28,6 +28,7 @@ version = "0.0.0"
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dependencies = [
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"bitflags 1.0.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"build_artiq 0.0.0",
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"byteorder 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"log 0.3.8 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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@ -9,6 +9,7 @@ name = "board"
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path = "lib.rs"
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[dependencies]
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byteorder = { version = "1.0", default-features = false }
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log = { version = "0.3", default-features = false }
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[features]
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@ -1,14 +1,17 @@
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#[cfg(has_spiflash)]
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mod imp {
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use core::str;
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use std::btree_map::BTreeMap;
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use byteorder::{ByteOrder, BigEndian};
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use board::{cache, spiflash};
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use cache;
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use spiflash;
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// One flash sector immediately after the bootloader.
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const ADDR: usize = ::mem::FLASH_BOOT_ADDRESS - spiflash::PAGE_SIZE;
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const SIZE: usize = spiflash::PAGE_SIZE;
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mod lock {
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use core::slice;
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use core::sync::atomic::{AtomicUsize, Ordering, ATOMIC_USIZE_INIT};
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use board;
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static LOCKED: AtomicUsize = ATOMIC_USIZE_INIT;
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@ -24,22 +27,7 @@ mod imp {
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}
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pub fn data(&self) -> &'static [u8] {
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extern {
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static _ftext: u8;
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static _fstorage: u8;
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static _estorage: u8;
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}
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unsafe {
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let base = &_ftext as *const _ as usize;
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let begin = &_fstorage as *const _ as usize;
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let end = &_estorage as *const _ as usize;
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let ptr = board::mem::FLASH_BOOT_ADDRESS + (begin - base);
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let len = end - begin;
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slice::from_raw_parts(ptr as *const u8, len)
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}
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unsafe { slice::from_raw_parts(super::ADDR as *const u8, super::SIZE) }
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}
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}
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@ -52,6 +40,7 @@ mod imp {
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use self::lock::Lock;
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#[derive(Clone)]
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struct Iter<'a> {
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data: &'a [u8],
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offset: usize
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@ -140,28 +129,39 @@ mod imp {
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spiflash::write(data.as_ptr() as usize, value);
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data = &data[value.len()..];
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cache::flush_l2_cache();
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Ok(data)
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}
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fn compact() -> Result<(), ()> {
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let lock = Lock::take()?;
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let mut items = BTreeMap::new();
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{
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let mut iter = Iter::new(lock.data());
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while let Some(result) = iter.next() {
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let (key, value) = result?;
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items.insert(key, value);
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}
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}
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static mut OLD_DATA: [u8; SIZE] = [0; SIZE];
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let old_data = unsafe {
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OLD_DATA.copy_from_slice(lock.data());
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&OLD_DATA[..]
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};
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let mut data = lock.data();
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spiflash::erase_sector(data.as_ptr() as usize);
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for (key, value) in items {
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unsafe { spiflash::erase_sector(data.as_ptr() as usize) };
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// This is worst-case quadratic, but we're limited by a small SPI flash sector size,
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// so it does not really matter.
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let mut iter = Iter::new(old_data);
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while let Some(result) = iter.next() {
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let (key, mut value) = result?;
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let mut next_iter = iter.clone();
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while let Some(next_result) = next_iter.next() {
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let (next_key, next_value) = next_result?;
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if key == next_key {
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value = next_value
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}
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}
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data = unsafe { append_at(data, key, value)? };
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}
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cache::flush_l2_cache();
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Ok(())
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}
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@ -178,7 +178,6 @@ mod imp {
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unsafe { append_at(free, key.as_bytes(), value)? };
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cache::flush_l2_cache();
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Ok(())
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}
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@ -200,7 +199,7 @@ mod imp {
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pub fn erase() -> Result<(), ()> {
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let lock = Lock::take()?;
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spiflash::erase_sector(lock.data().as_ptr() as usize);
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unsafe { spiflash::erase_sector(lock.data().as_ptr() as usize) };
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cache::flush_l2_cache();
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Ok(())
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@ -1,6 +1,7 @@
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#![feature(asm, lang_items)]
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#![no_std]
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extern crate byteorder;
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#[macro_use]
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extern crate log;
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@ -18,6 +19,7 @@ pub mod uart_console;
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#[cfg(has_spiflash)]
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pub mod spiflash;
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pub mod config;
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pub mod i2c;
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pub mod spi;
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@ -3,6 +3,10 @@
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use core::cmp;
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use csr;
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pub const PAGE_SIZE: usize = csr::CONFIG_SPIFLASH_PAGE_SIZE as usize;
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const PAGE_MASK: usize = PAGE_SIZE - 1;
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const CMD_PP: u8 = 0x02;
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const CMD_WRDI: u8 = 0x04;
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const CMD_RDSR: u8 = 0x05;
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@ -15,28 +19,24 @@ const PIN_DQ_I: u8 = 1 << 3;
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const SR_WIP: u8 = 1;
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fn write_byte(mut byte: u8) {
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unsafe {
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csr::spiflash::bitbang_write(0);
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for _ in 0..8 {
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csr::spiflash::bitbang_write((byte & 0x80) >> 7);
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csr::spiflash::bitbang_write((byte & 0x80) >> 7 | PIN_CLK);
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byte <<= 1;
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}
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csr::spiflash::bitbang_write(0);
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unsafe fn write_byte(mut byte: u8) {
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csr::spiflash::bitbang_write(0);
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for _ in 0..8 {
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csr::spiflash::bitbang_write((byte & 0x80) >> 7);
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csr::spiflash::bitbang_write((byte & 0x80) >> 7 | PIN_CLK);
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byte <<= 1;
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}
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csr::spiflash::bitbang_write(0);
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}
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fn write_addr(mut addr: usize) {
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unsafe {
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csr::spiflash::bitbang_write(0);
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for _ in 0..24 {
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csr::spiflash::bitbang_write(((addr & 0x800000) >> 23) as u8);
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csr::spiflash::bitbang_write(((addr & 0x800000) >> 23) as u8 | PIN_CLK);
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addr <<= 1;
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}
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csr::spiflash::bitbang_write(0);
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unsafe fn write_addr(mut addr: usize) {
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csr::spiflash::bitbang_write(0);
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for _ in 0..24 {
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csr::spiflash::bitbang_write(((addr & 0x800000) >> 23) as u8);
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csr::spiflash::bitbang_write(((addr & 0x800000) >> 23) as u8 | PIN_CLK);
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addr <<= 1;
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}
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csr::spiflash::bitbang_write(0);
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}
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fn wait_until_ready() {
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@ -59,54 +59,47 @@ fn wait_until_ready() {
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}
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}
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pub fn erase_sector(addr: usize) {
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unsafe {
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let sector_addr = addr & !(csr::CONFIG_SPIFLASH_SECTOR_SIZE as usize - 1);
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pub unsafe fn erase_sector(addr: usize) {
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let sector_addr = addr & !(csr::CONFIG_SPIFLASH_SECTOR_SIZE as usize - 1);
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csr::spiflash::bitbang_en_write(1);
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csr::spiflash::bitbang_en_write(1);
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wait_until_ready();
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wait_until_ready();
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write_byte(CMD_WREN);
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csr::spiflash::bitbang_write(PIN_CS_N);
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write_byte(CMD_WREN);
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csr::spiflash::bitbang_write(PIN_CS_N);
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write_byte(CMD_SE);
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write_addr(sector_addr);
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csr::spiflash::bitbang_write(PIN_CS_N);
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write_byte(CMD_SE);
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write_addr(sector_addr);
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csr::spiflash::bitbang_write(PIN_CS_N);
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wait_until_ready();
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wait_until_ready();
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csr::spiflash::bitbang_en_write(0);
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}
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csr::spiflash::bitbang_en_write(0);
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}
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fn write_page(addr: usize, data: &[u8]) {
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unsafe {
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csr::spiflash::bitbang_en_write(1);
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unsafe fn write_page(addr: usize, data: &[u8]) {
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csr::spiflash::bitbang_en_write(1);
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wait_until_ready();
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wait_until_ready();
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write_byte(CMD_WREN);
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csr::spiflash::bitbang_write(PIN_CS_N);
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write_byte(CMD_PP);
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write_addr(addr);
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for &byte in data {
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write_byte(byte)
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}
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csr::spiflash::bitbang_write(PIN_CS_N);
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csr::spiflash::bitbang_write(0);
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wait_until_ready();
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csr::spiflash::bitbang_en_write(0);
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write_byte(CMD_WREN);
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csr::spiflash::bitbang_write(PIN_CS_N);
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write_byte(CMD_PP);
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write_addr(addr);
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for &byte in data {
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write_byte(byte)
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}
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csr::spiflash::bitbang_write(PIN_CS_N);
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csr::spiflash::bitbang_write(0);
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wait_until_ready();
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csr::spiflash::bitbang_en_write(0);
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}
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const PAGE_SIZE: usize = csr::CONFIG_SPIFLASH_PAGE_SIZE as usize;
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const PAGE_MASK: usize = PAGE_SIZE - 1;
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pub fn write(mut addr: usize, mut data: &[u8]) {
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pub unsafe fn write(mut addr: usize, mut data: &[u8]) {
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if addr & PAGE_MASK != 0 {
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let size = cmp::min((PAGE_SIZE - (addr & PAGE_MASK)) as usize, data.len());
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write_page(addr, &data[..size]);
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@ -23,10 +23,11 @@ extern crate amp;
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extern crate drtioaux;
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use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
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use board::config;
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use proto::{mgmt_proto, analyzer_proto, moninj_proto, rpc_proto, session_proto, kernel_proto};
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use amp::{mailbox, rpc_queue};
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mod config;
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mod ethmac;
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mod rtio_mgt;
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@ -1,5 +1,4 @@
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use config;
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use board::csr;
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use board::{csr, config};
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use sched::Io;
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#[cfg(has_rtio_crg)]
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@ -66,15 +66,6 @@ SECTIONS
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_edata = .;
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} > runtime
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.storage :
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{
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/* Keep in sync with artiq_flash.py */
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. = _ftext + 0x100000;
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_fstorage = .;
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. += /*SPIFLASH_SECTOR_SIZE*/ 0x10000;
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_estorage = .;
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} > runtime
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.bss :
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{
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. = ALIGN(4);
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@ -3,14 +3,14 @@ use std::{mem, str};
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use std::cell::{Cell, RefCell};
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use std::io::{self, Read, Write};
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use std::error::Error;
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use {config, rtio_mgt, mailbox, rpc_queue, kernel};
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use {rtio_mgt, mailbox, rpc_queue, kernel};
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use cache::Cache;
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use rtio_dma::Manager as DmaManager;
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use urc::Urc;
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use sched::{ThreadHandle, Io};
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use sched::{TcpListener, TcpStream};
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use byteorder::{ByteOrder, NetworkEndian};
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use board;
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use board::{self, config};
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use rpc_proto as rpc;
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use session_proto as host;
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@ -69,8 +69,8 @@ def main():
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"start": "xc7_program xc7.tap",
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"gateware": 0x000000,
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"bios": 0xaf0000,
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"runtime": 0xb00000,
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"storage": 0xc00000,
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"storage": 0xb00000,
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"runtime": 0xb10000,
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},
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}[opts.target]
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@ -15,7 +15,7 @@ requirements:
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- python >=3.5.3,<3.6
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- setuptools 33.1.1
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- migen 0.5
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- misoc 0.8.dev py35_30+gitd95f4edb
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- misoc 0.8.dev py35_35+git6845fc0a
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- jesd204b 0.3
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- binutils-or1k-linux >=2.27
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- llvm-or1k 4.0.1
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