From 8b7d38d20357204eaa08f7c94dae27678b628715 Mon Sep 17 00:00:00 2001 From: whitequark Date: Sun, 9 Aug 2015 15:47:29 +0300 Subject: [PATCH] Add ARTIQ_DUMP_ASSEMBLY. --- artiq/compiler/targets.py | 21 ++++++++++++++++++++- artiq/coredevice/core.py | 11 +---------- 2 files changed, 21 insertions(+), 11 deletions(-) diff --git a/artiq/compiler/targets.py b/artiq/compiler/targets.py index b587e3d6e..a023945f7 100644 --- a/artiq/compiler/targets.py +++ b/artiq/compiler/targets.py @@ -1,4 +1,4 @@ -import tempfile, subprocess +import os, sys, tempfile, subprocess from llvmlite_artiq import ir as ll, binding as llvm llvm.initialize() @@ -56,10 +56,20 @@ class Target: def compile(self, module): """Compile the module to a relocatable object for this target.""" + + if os.getenv('ARTIQ_DUMP_IR'): + print("====== ARTIQ IR DUMP ======", file=sys.stderr) + for function in module.artiq_ir: + print(function, file=sys.stderr) + llmod = module.build_llvm_ir(self) llparsedmod = llvm.parse_assembly(str(llmod)) llparsedmod.verify() + if os.getenv('ARTIQ_DUMP_LLVM'): + print("====== LLVM IR DUMP ======", file=sys.stderr) + print(str(llparsedmod), file=sys.stderr) + llpassmgrbuilder = llvm.create_pass_manager_builder() llpassmgrbuilder.opt_level = 2 # -O2 llpassmgrbuilder.size_level = 1 # -Os @@ -68,10 +78,19 @@ class Target: llpassmgrbuilder.populate(llpassmgr) llpassmgr.run(llparsedmod) + if os.getenv('ARTIQ_DUMP_LLVM'): + print("====== LLVM IR DUMP (OPTIMIZED) ======", file=sys.stderr) + print(str(llparsedmod), file=sys.stderr) + lltarget = llvm.Target.from_triple(self.triple) llmachine = lltarget.create_target_machine( features=",".join(self.features), reloc="pic", codemodel="default") + + if os.getenv('ARTIQ_DUMP_ASSEMBLY'): + print("====== ASSEMBLY DUMP ======", file=sys.stderr) + print(llmachine.emit_assembly(llparsedmod), file=sys.stderr) + return llmachine.emit_object(llparsedmod) def compile_and_link(self, modules): diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py index 5188de1ae..91fa01562 100644 --- a/artiq/coredevice/core.py +++ b/artiq/coredevice/core.py @@ -1,4 +1,4 @@ -import os, sys, tempfile +import sys, tempfile from pythonparser import diagnostic @@ -35,15 +35,6 @@ class Core: module = Module(stitcher) target = OR1KTarget() - if os.getenv('ARTIQ_DUMP_IR'): - print("====== ARTIQ IR DUMP ======", file=sys.stderr) - for function in module.artiq_ir: - print(function, file=sys.stderr) - - if os.getenv('ARTIQ_DUMP_LLVM'): - print("====== LLVM IR DUMP ======", file=sys.stderr) - print(module.build_llvm_ir(target), file=sys.stderr) - return target.compile_and_link([module]), stitcher.rpc_map except diagnostic.Error as error: print("\n".join(error.diagnostic.render(colored=True)), file=sys.stderr)