From 8ad799a8504fa59ef5b99c0ce5ec732a2b78ef62 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 14 Mar 2016 15:14:49 +0100 Subject: [PATCH] gateware/rtio/analyzer: use new Converter --- artiq/gateware/rtio/analyzer.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/artiq/gateware/rtio/analyzer.py b/artiq/gateware/rtio/analyzer.py index ca66ee7bb..3ccf6214a 100644 --- a/artiq/gateware/rtio/analyzer.py +++ b/artiq/gateware/rtio/analyzer.py @@ -191,8 +191,7 @@ class Analyzer(Module, AutoCSR): dw = len(membus.dat_w) self.submodules.message_encoder = MessageEncoder(rtio_core) - self.submodules.converter = stream.Converter( - [("data", 256)], [("data", dw)], reverse=True) + self.submodules.converter = stream.Converter(256, dw, reverse=True) self.submodules.fifo = stream.SyncFIFO( [("data", dw)], fifo_depth, True) self.submodules.dma = DMAWriter(membus)