forked from M-Labs/artiq
runtime: work around mor1kx ignoring low bits of reset address.
Fixes #599.
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617e345d16
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898a716b91
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@ -7,7 +7,7 @@ from misoc.integration.soc_core import mem_decoder
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class KernelCPU(Module):
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def __init__(self, platform,
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exec_address=0x40800080,
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exec_address=0x40800000,
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main_mem_origin=0x40000000,
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l2_size=8192):
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self._reset = CSRStorage(reset=1)
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@ -3,7 +3,7 @@
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use core::marker::PhantomData;
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use core::fmt;
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pub const KERNELCPU_EXEC_ADDRESS: usize = 0x40800080;
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pub const KERNELCPU_EXEC_ADDRESS: usize = 0x40800000;
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pub const KERNELCPU_PAYLOAD_ADDRESS: usize = 0x40840000;
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pub const KERNELCPU_LAST_ADDRESS: usize = 0x4fffffff;
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pub const KSUPPORT_HEADER_SIZE: usize = 0x80;
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@ -8,7 +8,7 @@ const SEND_MAILBOX: *mut usize = (board::mem::MAILBOX_BASE + 4) as *mut usize;
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const RECV_MAILBOX: *mut usize = (board::mem::MAILBOX_BASE + 8) as *mut usize;
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const QUEUE_BEGIN: usize = 0x40400000;
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const QUEUE_END: usize = 0x40800000;
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const QUEUE_END: usize = 0x407fff80;
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const QUEUE_CHUNK: usize = 0x1000;
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pub unsafe fn init() {
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@ -21,7 +21,7 @@ fn next(mut addr: usize) -> usize {
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debug_assert!(addr >= QUEUE_BEGIN && addr < QUEUE_END);
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addr += QUEUE_CHUNK;
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if addr == QUEUE_END { addr = QUEUE_BEGIN }
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if addr >= QUEUE_END { addr = QUEUE_BEGIN }
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addr
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}
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@ -13,7 +13,7 @@ INCLUDE generated/regions.ld
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* are also loaded.
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*/
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MEMORY {
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ksupport (RWX) : ORIGIN = 0x40800080, LENGTH = 0x40000
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ksupport (RWX) : ORIGIN = 0x40800000, LENGTH = 0x40000
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}
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/* Kernel stack is at the end of main RAM. */
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