forked from M-Labs/artiq
suservo: fix coefficient data writing
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
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@ -81,8 +81,13 @@ class RTServoMem(Module):
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1 + # state_sel
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1 + # config_sel
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len(m_state.adr))
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internal_address = Signal(internal_address_width)
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self.comb += internal_address.eq(Cat(self.rtlink.o.address, self.rtlink.o.data[w.coeff:]))
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self.comb += internal_address.eq(Cat(self.rtlink.o.address,
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self.rtlink.o.data[w.coeff:]))
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coeff_data = Signal(w.coeff)
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self.comb += coeff_data.eq(self.rtlink.o.data[:w.coeff])
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we = internal_address[-1]
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state_sel = internal_address[-2]
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@ -91,7 +96,7 @@ class RTServoMem(Module):
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self.comb += [
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self.rtlink.o.busy.eq(0),
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m_coeff.adr.eq(internal_address[1:]),
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m_coeff.dat_w.eq(Cat(self.rtlink.o.data, self.rtlink.o.data)),
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m_coeff.dat_w.eq(Cat(coeff_data, coeff_data)),
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m_coeff.we[0].eq(self.rtlink.o.stb & ~high_coeff &
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we & ~state_sel),
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m_coeff.we[1].eq(self.rtlink.o.stb & high_coeff &
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