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gateware/targets/sayma_rtm: add false path between cd_sys and cd_clk200

This commit is contained in:
Florent Kermarrec 2017-12-21 23:52:44 +01:00
parent 8adb50037f
commit 86825a852c
1 changed files with 4 additions and 0 deletions
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4
artiq/gateware/targets/sayma_rtm.py
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@ -77,6 +77,10 @@ class SaymaRTM(Module):
self.crg.cd_sys.clk.attr.add("keep") self.crg.cd_sys.clk.attr.add("keep")
clk_freq = 125e6 clk_freq = 125e6
platform.add_period_constraint(self.crg.cd_sys.clk, 8.0) platform.add_period_constraint(self.crg.cd_sys.clk, 8.0)
platform.add_period_constraint(self.crg.cd_clk200.clk, 5.0)
platform.add_false_path_constraints(
self.crg.cd_sys.clk,
self.crg.cd_clk200.clk)
self.submodules.rtm_identifier = RTMIdentifier() self.submodules.rtm_identifier = RTMIdentifier()
csr_devices.append("rtm_identifier") csr_devices.append("rtm_identifier")