srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

compiler: use more LLVM tools on ARM (#733)

This commit is contained in:
Sebastien Bourdeauducq 2020-04-28 16:21:50 +08:00
parent 7e400a78f4
commit 85e92ae28c
1 changed files with 14 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
artiq/compiler/targets.py
View File

@ -68,8 +68,6 @@ class Target:
:var triple: (string) :var triple: (string)
LLVM target triple, e.g. ``"or1k"`` LLVM target triple, e.g. ``"or1k"``
:var linker: (string)
Linker to run.
:var data_layout: (string) :var data_layout: (string)
LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"`` LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"``
:var features: (list of string) :var features: (list of string)
@ -86,11 +84,15 @@ class Target:
triple = "unknown" triple = "unknown"
data_layout = "" data_layout = ""
features = [] features = []
linker = "lld"
print_function = "printf" print_function = "printf"
little_endian = False little_endian = False
now_pinning = True now_pinning = True
tool_ld = "ld.lld"
tool_strip = "llvm-strip"
tool_addr2line = "llvm-addr2line"
tool_cxxfilt = "llvm-cxxfilt"
def __init__(self): def __init__(self):
self.llcontext = ll.Context() self.llcontext = ll.Context()
@ -179,7 +181,7 @@ class Target:
def link(self, objects): def link(self, objects):
"""Link the relocatable objects into a shared library for this target.""" """Link the relocatable objects into a shared library for this target."""
with RunTool([self.linker, "-shared", "--eh-frame-hdr"] + with RunTool([self.tool_ld, "-shared", "--eh-frame-hdr"] +
["{{obj{}}}".format(index) for index in range(len(objects))] + ["{{obj{}}}".format(index) for index in range(len(objects))] +
["-o", "{output}"], ["-o", "{output}"],
output=None, output=None,
@ -196,7 +198,7 @@ class Target:
return self.link([self.assemble(self.compile(module)) for module in modules]) return self.link([self.assemble(self.compile(module)) for module in modules])
def strip(self, library): def strip(self, library):
with RunTool([self.triple + "-strip", "--strip-debug", "{library}", "-o", "{output}"], with RunTool([self.tool_strip, "--strip-debug", "{library}", "-o", "{output}"],
library=library, output=None) \ library=library, output=None) \
as results: as results:
return results["output"].read() return results["output"].read()
@ -210,7 +212,7 @@ class Target:
# inside the call instruction (or its delay slot), since that's what # inside the call instruction (or its delay slot), since that's what
# the backtrace entry should point at. # the backtrace entry should point at.
offset_addresses = [hex(addr - 1) for addr in addresses] offset_addresses = [hex(addr - 1) for addr in addresses]
with RunTool([self.triple + "-addr2line", "--addresses", "--functions", "--inlines", with RunTool([self.tool_addr2line, "--addresses", "--functions", "--inlines",
"--demangle", "--exe={library}"] + offset_addresses, "--demangle", "--exe={library}"] + offset_addresses,
library=library) \ library=library) \
as results: as results:
@ -241,7 +243,7 @@ class Target:
return backtrace return backtrace
def demangle(self, names): def demangle(self, names):
with RunTool([self.triple + "-c++filt"] + names) as results: with RunTool([self.tool_cxxfilt] + names) as results:
return results["__stdout__"].read().rstrip().split("\n") return results["__stdout__"].read().rstrip().split("\n")
class NativeTarget(Target): class NativeTarget(Target):
@ -257,16 +259,19 @@ class OR1KTarget(Target):
data_layout = "E-m:e-p:32:32-i8:8:8-i16:16:16-i64:32:32-" \ data_layout = "E-m:e-p:32:32-i8:8:8-i16:16:16-i64:32:32-" \
"f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32" "f64:32:32-v64:32:32-v128:32:32-a0:0:32-n32"
features = ["mul", "div", "ffl1", "cmov", "addc"] features = ["mul", "div", "ffl1", "cmov", "addc"]
linker = "or1k-linux-ld"
print_function = "core_log" print_function = "core_log"
little_endian = False little_endian = False
now_pinning = True now_pinning = True
tool_ld = "or1k-linux-ld"
tool_strip = "or1k-linux-strip"
tool_addr2line = "or1k-linux-addr2line"
tool_cxxfilt = "or1k-linux-c++filt"
class CortexA9Target(Target): class CortexA9Target(Target):
triple = "armv7-unknown-linux-gnueabihf" triple = "armv7-unknown-linux-gnueabihf"
data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
features = ["dsp", "fp16", "neon", "vfp3"] features = ["dsp", "fp16", "neon", "vfp3"]
linker = "ld.lld"
print_function = "core_log" print_function = "core_log"
little_endian = True little_endian = True
now_pinning = False now_pinning = False