forked from M-Labs/artiq
rtio/sed: pass sequence numbers through the FIFOs. Closes #978
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@ -32,16 +32,16 @@ class FIFOs(Module):
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fifos = []
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for input, output in zip(self.input, self.output):
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fifo = fifo_cls(layout_len(layout_payload), fifo_depth)
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fifo = fifo_cls(seqn_width + layout_len(layout_payload), fifo_depth)
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self.submodules += fifo
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fifos.append(fifo)
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self.comb += [
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fifo.din.eq(input.payload.raw_bits()),
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fifo.din.eq(Cat(input.seqn, input.payload.raw_bits())),
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fifo.we.eq(input.we),
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input.writable.eq(fifo.writable),
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output.payload.raw_bits().eq(fifo.dout),
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Cat(output.seqn, output.payload.raw_bits()).eq(fifo.dout),
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output.readable.eq(fifo.readable),
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fifo.re.eq(output.re)
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]
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