forked from M-Labs/artiq
ad9910: tweak spi timing for higher speed
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6a6695924f
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7f1bfddeda
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@ -64,7 +64,7 @@ class AD9910:
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def write32(self, addr, data):
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def write32(self, addr, data):
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.write(addr << 24)
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self.bus.write(addr << 24)
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delay_mu(-self.bus.xfer_period_mu)
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delay_mu(-self.bus.xfer_period_mu + 8)
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self.bus.set_xfer(self.chip_select, 32, 0)
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self.bus.set_xfer(self.chip_select, 32, 0)
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self.bus.write(data)
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self.bus.write(data)
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delay_mu(self.bus.xfer_period_mu - self.bus.write_period_mu)
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delay_mu(self.bus.xfer_period_mu - self.bus.write_period_mu)
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@ -74,7 +74,7 @@ class AD9910:
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.write(addr << 24)
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self.bus.write(addr << 24)
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t = self.bus.xfer_period_mu
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t = self.bus.xfer_period_mu
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delay_mu(-t)
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delay_mu(-t + 8)
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self.bus.set_xfer(self.chip_select, 32, 0)
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self.bus.set_xfer(self.chip_select, 32, 0)
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self.bus.write(data_high)
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self.bus.write(data_high)
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self.bus.write(data_low)
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self.bus.write(data_low)
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@ -84,7 +84,7 @@ class AD9910:
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def read32(self, addr):
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def read32(self, addr):
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.set_xfer(self.chip_select, 8, 0)
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self.bus.write((addr | 0x80) << 24)
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self.bus.write((addr | 0x80) << 24)
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delay_mu(-self.bus.xfer_period_mu)
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delay_mu(-self.bus.xfer_period_mu + 8)
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self.bus.set_xfer(self.chip_select, 0, 32)
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self.bus.set_xfer(self.chip_select, 0, 32)
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self.bus.write(0)
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self.bus.write(0)
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delay_mu(2*self.bus.xfer_period_mu)
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delay_mu(2*self.bus.xfer_period_mu)
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