From 7f1bfddeda8c821a88c9fc928020e6f134a35304 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Mon, 12 Feb 2018 17:41:42 +0000 Subject: [PATCH] ad9910: tweak spi timing for higher speed --- artiq/coredevice/ad9910.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py index 30628af4c..4b958b97e 100644 --- a/artiq/coredevice/ad9910.py +++ b/artiq/coredevice/ad9910.py @@ -64,7 +64,7 @@ class AD9910: def write32(self, addr, data): self.bus.set_xfer(self.chip_select, 8, 0) self.bus.write(addr << 24) - delay_mu(-self.bus.xfer_period_mu) + delay_mu(-self.bus.xfer_period_mu + 8) self.bus.set_xfer(self.chip_select, 32, 0) self.bus.write(data) delay_mu(self.bus.xfer_period_mu - self.bus.write_period_mu) @@ -74,7 +74,7 @@ class AD9910: self.bus.set_xfer(self.chip_select, 8, 0) self.bus.write(addr << 24) t = self.bus.xfer_period_mu - delay_mu(-t) + delay_mu(-t + 8) self.bus.set_xfer(self.chip_select, 32, 0) self.bus.write(data_high) self.bus.write(data_low) @@ -84,7 +84,7 @@ class AD9910: def read32(self, addr): self.bus.set_xfer(self.chip_select, 8, 0) self.bus.write((addr | 0x80) << 24) - delay_mu(-self.bus.xfer_period_mu) + delay_mu(-self.bus.xfer_period_mu + 8) self.bus.set_xfer(self.chip_select, 0, 32) self.bus.write(0) delay_mu(2*self.bus.xfer_period_mu)