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gateware/serwb: generate wishbone error if link loose ready in the middle of a transaction

This commit is contained in:
Florent Kermarrec 2017-08-29 16:41:29 +02:00
parent 60ad36e7d6
commit 7d7f6be7ce
1 changed files with 30 additions and 20 deletions

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@ -667,6 +667,9 @@ class EtherboneWishboneSlave(Module):
) )
) )
fsm.act("SEND_WRITE", fsm.act("SEND_WRITE",
If(~self.ready,
NextState("SEND_ERROR")
).Else(
source.stb.eq(1), source.stb.eq(1),
source.eop.eq(1), source.eop.eq(1),
source.base_addr[2:].eq(bus.adr), source.base_addr[2:].eq(bus.adr),
@ -679,7 +682,11 @@ class EtherboneWishboneSlave(Module):
NextState("IDLE") NextState("IDLE")
) )
) )
)
fsm.act("SEND_READ", fsm.act("SEND_READ",
If(~self.ready,
NextState("SEND_ERROR")
).Else(
source.stb.eq(1), source.stb.eq(1),
source.eop.eq(1), source.eop.eq(1),
source.base_addr.eq(0), source.base_addr.eq(0),
@ -691,9 +698,12 @@ class EtherboneWishboneSlave(Module):
NextState("WAIT_READ") NextState("WAIT_READ")
) )
) )
)
fsm.act("WAIT_READ", fsm.act("WAIT_READ",
sink.ack.eq(1), sink.ack.eq(1),
If(sink.stb & sink.we, If(~self.ready,
NextState("SEND_ERROR")
).Elif(sink.stb & sink.we,
bus.ack.eq(1), bus.ack.eq(1),
bus.dat_r.eq(sink.data), bus.dat_r.eq(sink.data),
NextState("IDLE") NextState("IDLE")