diff --git a/artiq/coredevice/dac34h84.py b/artiq/coredevice/dac34h84.py index e421851a7..51b93e6a0 100644 --- a/artiq/coredevice/dac34h84.py +++ b/artiq/coredevice/dac34h84.py @@ -110,7 +110,7 @@ class DAC34H84: syncsel_mixercd = 0b1001 # sif_sync and register write syncsel_nco = 0b1000 # sif_sync syncsel_fifo_input = 0b10 # external lvds istr - sif_sync = 1 + sif_sync = 0 syncsel_fifoin = 0b0010 # istr syncsel_fifoout = 0b0100 # ostr diff --git a/artiq/coredevice/phaser.py b/artiq/coredevice/phaser.py index e122c75c1..9626a1b78 100644 --- a/artiq/coredevice/phaser.py +++ b/artiq/coredevice/phaser.py @@ -229,6 +229,8 @@ class Phaser: for data in self.dac_mmap: self.dac_write(data >> 16, data) delay(40*us) + self.dac_sync() + delay(40*us) # pll_ndivsync_ena disable config18 = self.dac_read(0x18) @@ -556,6 +558,15 @@ class Phaser: """ return self.dac_read(0x06, div=257) >> 8 + @kernel + def dac_sync(self): + """Trigger DAC synchronisation for both output channels. + If the DAC-NCO is enabled, this applies NCO frequency changes.""" + config1f = self.dac_read(0x1f) + delay(.1*ms) + self.dac_write(0x1f, config1f & ~int32(1 << 1)) + self.dac_write(0x1f, config1f | (1 << 1)) + @kernel def get_dac_alarms(self): """Read the DAC alarm flags. @@ -768,6 +779,7 @@ class PhaserChannel: @kernel def set_nco_frequency_mu(self, ftw): """Set the NCO frequency. + The frequency is only applied after DAC synchronisation. :param ftw: NCO frequency tuning word (32 bit) """ @@ -777,6 +789,7 @@ class PhaserChannel: @kernel def set_nco_frequency(self, frequency): """Set the NCO frequency in SI units. + The frequency is only applied after DAC synchronisation. :param frequency: NCO frequency in Hz (passband from -400 MHz to 400 MHz, wrapping around at +- 500 MHz)