fix old line that I forgot

2022-06-21 07:43:28 +00:00 · 2022-06-21 07:43:28 +00:00 · 751af3144e
parent 5df766e6da
commit 751af3144e
1 changed files with 1 additions and 3 deletions
--- a/artiq/coredevice/phaser.py
+++ b/artiq/coredevice/phaser.py
@ -1073,9 +1073,7 @@ class PhaserChannel:
            data = 1
        if hold == 1:
            data = data | (1 << 1)
-        if bypass:
-            hold = 1
-        data = (profile << 2) | (hold << 1) | (bypass << 0)
+        data = data | (profile << 2)
        self.phaser.write8(addr, data)

    @kernel