forked from M-Labs/artiq
kasli/ustc: use TTLOut
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@ -750,7 +750,11 @@ class USTC(_StandaloneBase):
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for i in range(24):
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eem_offset, port = divmod(i, 8)
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pads = platform.request("eem{}".format(5 + eem_offset), port)
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phy = ttl_serdes_7series.InOut_8X(pads.p, pads.n)
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if i < 4:
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cls = ttl_serdes_7series.InOut_8X
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else:
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cls = ttl_serdes_7series.Output_8X
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phy = cls(pads.p, pads.n)
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy))
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