From 70b7f28ad35f58ccf83bc00542862c54f185e465 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 23 Dec 2017 22:58:51 +0800 Subject: [PATCH] drtio: drive SFP TX disable pins --- artiq/gateware/targets/sayma_amc_drtio_master.py | 5 +++-- artiq/gateware/targets/sayma_amc_drtio_satellite.py | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/artiq/gateware/targets/sayma_amc_drtio_master.py b/artiq/gateware/targets/sayma_amc_drtio_master.py index 1d4d7ba09..ac47e00ab 100755 --- a/artiq/gateware/targets/sayma_amc_drtio_master.py +++ b/artiq/gateware/targets/sayma_amc_drtio_master.py @@ -53,10 +53,11 @@ class Master(MiniSoC, AMPSoC): self.config["HAS_SI5324"] = None self.config["SI5324_FREE_RUNNING"] = None + self.comb += platform.request("sfp_tx_disable_n", 0).eq(1) self.submodules.transceiver = gth_ultrascale.GTH( clock_pads=platform.request("si5324_clkout"), - tx_pads=[platform.request("sfp_tx")], - rx_pads=[platform.request("sfp_rx")], + tx_pads=[platform.request("sfp_tx", 0)], + rx_pads=[platform.request("sfp_rx", 0)], sys_clk_freq=self.clk_freq, rtio_clk_freq=rtio_clk_freq) diff --git a/artiq/gateware/targets/sayma_amc_drtio_satellite.py b/artiq/gateware/targets/sayma_amc_drtio_satellite.py index 6d046862c..82f9f52e5 100755 --- a/artiq/gateware/targets/sayma_amc_drtio_satellite.py +++ b/artiq/gateware/targets/sayma_amc_drtio_satellite.py @@ -55,10 +55,11 @@ class Satellite(BaseSoC): self.submodules.rtio_moninj = rtio.MonInj(rtio_channels) self.csr_devices.append("rtio_moninj") + self.comb += platform.request("sfp_tx_disable_n", 0).eq(1) self.submodules.transceiver = gth_ultrascale.GTH( clock_pads=platform.request("si5324_clkout"), - tx_pads=[platform.request("sfp_tx")], - rx_pads=[platform.request("sfp_rx")], + tx_pads=[platform.request("sfp_tx", 0)], + rx_pads=[platform.request("sfp_rx", 0)], sys_clk_freq=self.clk_freq, rtio_clk_freq=rtio_clk_freq) rx0 = ClockDomainsRenamer({"rtio_rx": "rtio_rx0"})