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firmware: support building without SDRAM

This commit is contained in:
Sebastien Bourdeauducq 2019-01-05 23:41:30 +08:00
parent cf9447ab77
commit 6e43c41103
2 changed files with 6 additions and 0 deletions
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2
artiq/firmware/libboard_misoc/lib.rs
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@ -15,7 +15,9 @@ pub use arch::*;
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs"));
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs"));
#[cfg(has_dfii)]
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/sdram_phy.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/sdram_phy.rs"));
#[cfg(has_dfii)]
pub mod sdram; pub mod sdram;
pub mod ident; pub mod ident;
pub mod clock; pub mod clock;

4
artiq/firmware/libboard_misoc/or1k/cache.rs
View File

@ -1,6 +1,9 @@
#[cfg(has_ddrphy)]
use core::ptr; use core::ptr;
use super::spr::*; use super::spr::*;
#[cfg(has_ddrphy)]
use csr; use csr;
#[cfg(has_ddrphy)]
use mem; use mem;
pub fn flush_cpu_icache() { pub fn flush_cpu_icache() {
@ -35,6 +38,7 @@ pub fn flush_cpu_dcache() {
} }
} }
#[cfg(has_ddrphy)]
pub fn flush_l2_cache() { pub fn flush_l2_cache() {
unsafe { unsafe {
for i in 0..2 * (csr::CONFIG_L2_SIZE as usize) / 4 { for i in 0..2 * (csr::CONFIG_L2_SIZE as usize) / 4 {