forked from M-Labs/artiq
Merge branch 'master' into drtio
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commit
651d538217
@ -1265,10 +1265,12 @@ class LLVMIRGenerator:
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return ll.Undefined
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# T result = {
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# void *ptr = NULL;
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# loop: int size = rpc_recv("tag", ptr);
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# void *ret_ptr = alloca(sizeof(T));
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# void *ptr = ret_ptr;
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# loop: int size = recv_rpc(ptr);
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# // Non-zero: Provide `size` bytes of extra storage for variable-length data.
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# if(size) { ptr = alloca(size); goto loop; }
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# else *(T*)ptr
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# else *(T*)ret_ptr
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# }
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llprehead = self.llbuilder.basic_block
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llhead = self.llbuilder.append_basic_block(name="rpc.head")
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@ -1283,7 +1285,7 @@ class LLVMIRGenerator:
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self.llbuilder.branch(llhead)
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self.llbuilder.position_at_end(llhead)
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llphi = self.llbuilder.phi(llslotgen.type, name="rpc.size")
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llphi = self.llbuilder.phi(llslotgen.type, name="rpc.ptr")
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llphi.add_incoming(llslotgen, llprehead)
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if llunwindblock:
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llsize = self.llbuilder.invoke(self.llbuiltin("recv_rpc"), [llphi],
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